RadTol Eclipse FPGAs
Aeroflex Colorado Springs' RadTol Eclipse FPGA offers proven commercial architecture, guaranteed radiation performance and reliability, an efficient low power, high performance FPGA fabric coupled with embedded RadTol SRAM.
The Eclipse FPGA was awarded QML V qualification in March 2010 - SMD 5962-04229 for both QML Q and V.
Aeroflex now offers a programming and post-program electrical testing for HiRel applications!
The SpaceWire Protocol Handler IP is available for the RadTol Eclipse FPGA.
For more information, please call 800-645-8862.
UT6325 RadTol Eclipse FPGA Product- 0.25um, five-layer metal, ViaLink™ epitaxial CMOS process
- 320,000 usable system gates
- 24 dual-port SRAM modules
- 208 CQFP, 288 CQPF, 484 CLGA and 484 CCGA packages
- Available to SMD 5962-04229, QML Q and V, 300krad (Si)
Aeroflex FPGA Programming- Factory programming
- Post-programmed ViaLink analysis
- Functional test, DC and timing baseline
- Post-programmed conditioning
- Post-conditioning ViaLink, DC and timing analysis
SpaceWire Embedded Core Protocol Handler- Dual ECSS-E-50-12A compliant links
- Data rates from 2 to 100 Mbits/sec
- 9-bit transmit and receive FIFO user interface
- Hard macro for the UT6325 RadTol Eclipse FPGA
- QML Q qualified, 300krad (Si)
